Bit Size:
Clock Edge Trigger Type:
Core Architecture:
Flash Size:
fmax-Min:
JESD-609 Code:
Memory Size:
Moisture Sensitivity Level (MSL):
Number of Bits per Element:
Number of Outputs:
Number of Pins:
Number of Timers/Counters:
Packing Method:
Part Status:
Pbfree Code:
Peak Reflow Temperature (Cel):
Pin Count:
Propagation Delay:
Reach Compliance Code:
ROM (words):
Supply Voltage-Max (Vsup):
Supply Voltage-Min (Vsup):
Terminal Position:
Time@Peak Reflow Temperature-Max (s):
uPs/uCs/Peripheral ICs Type:
Voltage - Supply:
RFQ
BOM